Website: galatime.com
Twitter: @kaushikgala
Pune, India
- Industry & Market Analysis
- Detailed industry, market and value-chain analysis for India, specifically: energy efficiency, cleantech and advanced engineering.
- Research on existing and upcoming/innovative technology business models in India
- Understanding impact of central & state government policies on technology businesses in India
- (Cross-border) Business Development
- Act as local contact to manage relationships between UK/EU clients and Indian companies/institutions
- Establish and refine sales & marketing strategy, develop local partner network and ecosystem
- Validate potential clients via due diligence, draft proposals, support contract negotiation
Sr. Manager - New Ventures @ Venture Center
- Technology commercialization via Spinoffs
- Launched Venture Center's flagship program - Lab2Mkt - to create technology spinoffs from R&D labs in India
- Developed stage-gate processes and critical resources to effectively take science to the market, with support from a unique Proof-of-Concept fund
- Drafted, negotiated and executed technology commercialization agreements with R&D institutions, within the frameworks laid down by GoI regulation
- Seed funding for Indian technology startups
- Assisted investment committee with seed funding of technology startups, via the (micro) seed fund scheme of the Technology Development Board (TDB)
- Managed various aspects (business plan review, preliminary evaluation, committee presentations, 3rd party due-diligence, investment & pledge agreements, post-investment tracking, etc.) of seed funding
Knowledge Sharing
- Niti - Practical wisdom for Indian startups.
- Galatime @ Tumblr - Global Macro Quant micro-blog for Indian investors.
Networks & Events
- Faculty at DBT-ABLE workshops on Enterprise Building & Innovation in Biotechnology Firms
- Delivered talks on technology entrepreneurship, intellectual property valuation, investing, etc. at Venture Center, NCL, SIMS Khadki.
- Attended / hosted talks on technology innovation, entrepreneurship, venture capital, seed funding, etc. via PuneTech, PuneChips, PuneCleanTech, local VCs.
- Technology commercialization
- Designed Venture Center's flagship program - Lab2Mkt - to identify science/technology commercialization opportunities from R&D labs in India
- Successfully raised government grant(s) for a Proof-of-Concept fund to bridge the gap between scientific competencies and PoC/prototypes required for technology spin-offs
- Explored market opportunities related to chemical/material/biological sciences w.r.t. new venture creation; investigated startup ideas for water treatment, diagnostics, bio-medical devices, security features, etc.
- Organized ACTIV workshops with AcceleratorIndia (Cambridge, UK) to train scientists, R&D executives, incubator managers and technology transfer professionals in India
- Sales & marketing
- Interacted with 200+ Pune entrepreneurs, tech startups & MSMEs - developed a deep understanding of challenges facing entrepreneurs & MSMEs in India
- Designed, priced & marketed incubator services; brought in new clients as residents (incubatees) and beneficiaries of Venture Center
- Raised awareness about technology business incubator amongst press/media, entrepreneur networks, Pune industrial consortia (eg. CII, MCCIA), and academic/research institutions in Pune
- Interacted with a variety of domestic & international organizations focused on technology entrepreneurship (eg. senior personnel from various departments/ministries of GoI, economic development councils from Canada, Belgium & Finland, US/UK companies looking for Indian IP, etc.)
- Venture funding for startups
- Advised & assisted entrepreneurs to obtain financial support from various central government schemes (eg. MoMSME support grant, Techno-entrepreneur Promotion Programme - TePP, etc.)
- Raised a seed fund corpus for technology startups, via the 1 crore seed fund scheme of the Technology Development Board (TDB)
- Assisted in the creation of a unique online funding database for Indian entrepreneurs
- Fund-raising
- Successfully pitched proposals to various central government agencies for new programs & services at Venture Center (eg. Ministry of MSME - MoMSME, Department of Science & Technology - DST, Department of Scientific & Industrial Research - DSIR)
- Led the creation of a unique collection of books, magazines & databases at the Venture Center library for technology entrepreneurs
Research & Teaching
- Essays on investing in technology enterprises in India
- Essays on risk capital for Micro, Small & Medium Enterprises (MSMEs) in India
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Adjunct -> Visiting Faculty @ Symbiosis Institute of Business Management (SIBM), Lavale campus
-- Courses: Entrepreneurship, Applied IT, Technology in Capital Markets
-- Other: Design/supervision of summer projects, thesis/reports, interviews, etc.
Networks & Events
- Panelist at IIT Kanpur's Annual Global Conference on Entrepreneurship and Technology Innovation (AGCETI 2010).
- Participant in 2-week workshop on Technology Commercialization (IC2 Institute, University of Texas, Austin).
- Part of CIIE's network of mentors - MentorEdge - that seeks to help technology entrepreneurs and early-stage startups.
- Part of Economic Times Power of Ideas's network of mentors.
- Speaker/panelist at BarCamp & Startup Saturday, Pune.
- Co-founded Moneyoga as one of the first quant hedge funds for Indian capital markets
- Developed company strategy, pitched to potential venture investors, explored partnership opportunities with financial services companies
- Researched data sources, market analytics & system-based trading for stocks, futures & options; created a portfolio of back-tested trading strategies
- Designed, developed & deployed a high-end stock market analytics Internet portal (www.moneyoga.com)
- Explored the creation of portfolio management services for HNIs with a focus on futures & options
- Mined patent portfolios of IPVALUE partners (eg. Xerox, Palo Alto Research Center, British Telecom, etc.)
- Conducted valuation of IP portfolios for commercialization via assertion, assignment
- Participated in consulting engagements with top-tier private equity companies to estimate value of intangible IP assets prior to M&A / LBO transactions
- Identified licensing opportunities for the company's intellectual property portfolio - composed of 5000+ patents covering the design, analysis, processing and system integration of semiconductor devices and integrated circuits (ICs)
- Participated in the technical analysis of patents covering the design and manufacturing of integrated circuits fabricated using silicon-on-insulator (SoI) and silicon-germanium (SiGe) technologies
- Collaborated with semiconductor IC design and manufacturing process experts to identify strategic patents for commercialization
[Featured in Forbes' Best-of-the-Web financial blogs, 2004]
- Research & Development
- Responsible for research & development of design automation software tools for high performance integrated circuits
- Evaluated and benchmarked competing industrial software products for design and analysis of semiconductor integrated circuits
- Negotiated third-party EDA vendor agreements, resulting in 40% reduction in software licensing costs
- Program Management
- Developed processes for issue tracking, resource allocation and requirements management for a group of 200+ technologists
- Adopted corporate PM methodology, tools, and new product introduction processes
- Intellectual Property Licensing
- Participated in the Motorola SPS Intellectual Property licensing workshop at IC2 Institute, UT Austin
- Investigated the feasibility of commercialization for Motorola IT and manufacturing innovations
- Performed IP valuation of internally developed EDA software tools
Networks & Events
- Contributing Member, Virtual Socket Interface Alliance (VSIA) Signal Integrity Working Group
- Industry Liasion, Semiconductor Research Consortium
- Invited contributor, speaker and reviewer at international electronic design automation (EDA) conferences, ACM/IEEE journals and workshops
- Active Committee Member, Network of Indian Professionals, Austin chapter
Publications (DBLP)
- "On-Chip Inductance Modeling and Analysis", Design Automation Conference 2000 [Best Paper Award]
- "On-Chip Inductance Modeling", Great Lakes Symposium on VLSI 2000
- "Fast Analysis and Optimization of Power/Ground Networks", International Conference on Computer-Aided Design 2000
- "Inductance 101: Analysis and Design Issues", Design Automation Conference 2001
- "Analysis and Modeling of Deep-Submicron Issues in High Performance Design", PATMOS 2001
- "Inductance Model and Analysis Methodology for High-Speed On-chip Interconnect", IEEE Transactions on Very Large Scale Integration Systems 2002, Special Issue on On -Chip Inductance in High Speed Integrated Circuits
- "Inductance: Implications and Solutions for High-Speed Digital Circuits", International Conference on Solid State Circuits 2002
- "A Precorrected-FFT Method for Simulating On-chip Inductance", International Conference on Computer Aided Design 2002
- "Fast On-chip Inductance Simulation using a Precorrected-FFT Method", IEEE Transactions on Computer Aided Design 2002
- "Worst Case Clock Skew under Power Supply Variation", ACM/IEEE International Workshop on Timing Issues - TAU 2002
- "Path-Based Statistical Timing Analysis Considering Inter- and Intra-Die Variations", ACM/IEEE International Workshop on Timing Issues - TAU 2002
- "Statistical Delay Computation Considering Spatial Correlations", Asia South Pacific Design Automation Conference 2003
- "Signal Integrity for IP Blocks for Digital and Analog Mixed-Signal Designs", Virtual Socket Interface Alliance 2002
- "Analysis and Optimization of Structured Power/Ground Networks", IEEE Transactions on Computer Aided Design 2003
- "Table look-up based compact modeling for on-chip interconnect timing and noise analysis", International Symposium on Circuits and Systems 2003
Master of Business Admistration (MBA), University of Texas
[Texas Evening MBA - TEMBA - Batch of 2004]
- Project: Corporate Venture Capital: Organizational Issues & Trends (PDF)
- Project: Software solutions for Intellectual Property management
- GPA: 3.9/4.0
- GMAT: 770/800
- Teaching Assistant for lab course for EE seniors
- Research Assistant to Prof. Sachin Sapatnekar
- Summer Intern at System-on-Chip Design Technology Group, Motorola SPS, Austin, Texas, US
- Major: Electrical Engineering
- Minor: Computer Science
- Project: Analysis & optimization of distributed power/ground networks for high performance VLSI circuits
- GPA: 4.0/4.0
- GRE: 2290/ 2400
- Major: Instrumentation & Control Engineering
- Project: Neural network analysis
- Paper: Excimer laser corneal surgery; won award at REC-Trichy
| Year | University Rank |
| Fourth | #3 |
| Third | #1 |
| Second | #2 |
| First | #2 |
- Major: Science
- Ranked 5th in Pune Merit List
- Languages learnt: English, Hindi, Marathi, Gujarati, Kutchi, French